1. Field of the Invention
This invention relates to a plastic packaged semiconductor device, and more particularly to a multichip packaged semiconductor device having a plurality of LSI chips or discrete semiconductor elements transfer-molded in a single package and a method for manufacturing the same.
2. Description of the Related Art
In recent years, considerable attention has been paid to a multichip packaged semiconductor device having a plurality of LSI chips or discrete semiconductor elements which are molded in a single package having a particular shape or the same shape as that of a standard integrated circuit device in order to enhance the density and miniaturize the semiconductor device. The packaged semiconductor device is briefly called a multichip package (MCP), and it can be used in combination with the conventional LSI chips or discrete semiconductor elements and the conventional manufacturing device and testing device for effecting the LSI manufacturing process and testing process can be used. Therefore, the turn around time (TAT) taken for forming a plurality of integrated circuits into one chip when developing new integrated circuits can be made short and the development cost can be made low. Further, since the conventional LSIs and discrete semiconductor devices are used, the package can be dealt with in the same manner as in the prior art case. In addition, in the MCP, it is only required to newly develop lead frames, and since the outer lead section having the same shape as that arranged in the package line-up can be used, it is only necessary to design the inner lead section of the lead frame. For this reason, the package is suitable for the custom IC, and the custom IC can be manufactured in a shorter TAT than in a case wherein a hybrid IC or the like is manufactured.
The inventor of this application developed the technique of manufacturing multichip packaged semiconductor devices by mounting a plurality of LSI chips or discrete semiconductor elements on a lead frame and sealing them into a single package by the transfer molding and commercialized the multichip packaged semiconductor devices. The multichip packaging technique is disclosed in detail in "NIKKEI MICRODEVICES" February, 1989, pp 95 to 101 a thesis written by the inventor and some of his colleagues. Further, the inventor of this application filed a U.S. patent application (U.S. patent application Ser. No. 07/506,251) relating to the multichip packaging technique and received an allowance thereof on Aug. 9, 1991.
As the integration density of the semiconductor device such as IC or LSI becomes higher, the number of electrode pads for supplying input signals and power source voltages or outputting output signals is increased, the power consumption is also increased, and the operation speed is made higher. When the electrode pads connected to bonding wires are arranged at a higher density on a chip with an increase in the integration density of the semiconductor device, the bonding tool will come into contact with adjacent bonding wires at the same time, thereby making it impossible to attain correct bonding. Further, since the size of the electrode pad and the electrode pad pitch cannot be made less than a certain value even if the semiconductor elements can be miniaturized, the chip size comes to have a limitation and the signal wiring length cannot be reduced on the chip.
In order to solve the above problem, the tape automated bonding (TAB) technique using a tape carrier is proposed. The TAB technique is a method effected by forming a device hole in a long flexible resin film, disposing metal wirings formed of a plurality of leads around the device hole, and connecting the metal wirings to electrode pads of the chip via the projected electrodes (bumps) and it may be applied to a semiconductor device such as a GaAs integrated circuit which requires a high operation speed. The TAB technique is described in detail in the article by KENZO HATADA, MATSUSHITA Electric Industrial Co. "Introduction to TAB Technique" published from Industrial Research Committee, for example.
However, in the semiconductor device formed by using the TAB technique, it is possible to derive out electrodes from discrete chips, but since it is impossible to constitute circuits by making use of a plurality of chips, it cannot be applied to the MCP type semiconductor device described above. Further, since the tape carrier is not formed of material such as a lead frame with high heat conductivity and the thermal resistance is large and heat radiation efficiency is low, a severe limitation is imposed on the type of semiconductor device in which the TAB technique can be used. In addition, since the outer lead is mechanically weak, it becomes impossible to wrap the same after it is separated from the tape carrier, and it becomes necessary to prepare a specified mounting device on the user's side, thus lowering the flexibility thereof and raising the cost of the instrument using the TAB package.
Further, a technique for connecting an electrode pad of a chip to an inner lead section of a lead frame by use of the above TAB technique is disclosed in Japanese Patent Disclosure No. 2-121343. By using the technique disclosed in the above Japanese Patent Disclosure, some of the defects associated with the TAB technique can be eliminated, but the above Japanese Patent Disclosure discloses or suggests nothing about the application of the technique to the MCP type semiconductor device.